TURBO-DECO-XM-UT3【PDF 6/22 页】SITE LICENSE TURBO DECODER XP

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Lattice Semiconductor

Turbo Decoder User’s Guide

Figure 3. Turbo Decoder Data Flow

Asynchronous reset initializes the core.

Block size and number of iterations is specified.

Data and parity values are placed on input bus

din and are written to input buffer.

MAP Decoder begins operating on the data block.

Computation of LLR for each data symbol begins.

After the iterations are computed, the results of

final LLR values are available in LLR memory.

The rfo pin is asserted so the user can

read the hard decision using handshake signal.

Hard decision is available on output pin dout .

Figure 4 shows the loading of block size and iterations for the current input block with assertion of input signal

blocksizeset(ipcfgset) after asynchronous reset rstn has been de-asserted. After the reset assertion, the

Turbo Decoder asserts rfi to indicate that it can receive a data block. At the same time the decoder de-asserts

rfo signal to show that there is no data available to give any hard decisions at the output.

Figure 4. Initialization and Data Input to Decoder

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